Cadence Virtuoso
Schematic
Tips
Using netSet and Net Expressions. In the lower hiererchy cell use Create > Net Expression… and give it a name and a global default value. In the upper hierarchy level use Edit > Net Expression > Available Properties… to connect the net to one existing in the upper hierarchy level. If a component only accepts net connections through netSet, and you want to use a net expression there, use the format [@net_name:%:net_name!]
.
Using variables as instance parameters. In the instance parameter insert pPar("varname")
. Go to the CIW > Tools > CDF > Edit
and add the varname
to the Base CDF layer. varname
will now appear as a parameter you can set when instancing your cell.
Series components. e.g. a ring oscillator with series inverters. Input net: IN,A<0:9>
. Output net: A<0:9>,OUT
.
Shortcuts
Function |
Key |
Notes |
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Draw wire |
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Click the middle mouse button to toggle routing style |
Draw thick wire |
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Label wire |
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Separate multiple names with spaces |
Add pin |
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Add instance |
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Undo |
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Redo |
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Copy |
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Move |
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Middle click to rotate while moving |
Rotate |
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Fit to window |
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Zoom out/in |
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Zoom to rectangle |
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Previous zoom level |
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Descend into instance (read) |
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Descend into instance (edit) |
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Return to higher hierarchy level |
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Save |
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Will delete undo history! |
Check and save |
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Will delete undo history! |
Change display options |
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Magnifier |
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Highlight net |
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Right click on net to remove |
Change object properties |
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Text note |
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Create symbol |
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Open symbol |
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Make editable / read only |
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Layout
Tips
To highlight an electrical net, select Connectivity > Nets > Mark… Then use F3
to select the layers via which you want to trace. Turn off NP, PP, CO to prevent highlighting the substrate.
For labels generated inside scripts it’s usefule to use Tools -> Create Pins From Labels after importing them into a layout.
When creating a cell to mosaic, you can draw a rectangle in the instance;drawing
layer to define the instance outline size.
Preferences
E
> Dim Major Dots
Options > Selection > Disable “Select objects larger than the window”
Shortcuts
Function |
Key |
Notes |
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Options of current tool |
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Very useful |
Draw rectangle |
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Draw path segment |
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Draw polygon |
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Undo |
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Redo |
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Save |
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Copy |
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Repeat Copy |
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Press |
Move |
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Toggle snapping mode |
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Quick align |
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Stretch |
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Rotate |
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Ruler |
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Deselect |
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Delete rulers |
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Display options |
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Layout editor options |
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Zoom in |
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Zoom out |
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Zoom to rectangle |
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Fit view to window |
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Previous zoom level |
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Next zoom level |
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Create via |
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Add pin label |
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Add instance |
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Change select mode |
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Edges or complete shapes |
Show instance detail |
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Hide instance detail |
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Cut into shape |
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Merge shapes |
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Add to shape |
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Object properties |
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Descend (read/write) |
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Descend (edit in place) |
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Ascend |
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Toggle info baloon |
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Mark net |
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Remove net highlights |
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Toggle gravity |
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Draw metal buses |
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Library
Find and delete locks in library
find . -name "*lck*"
find . -name "*lck*" -delete
ADE Explorer
Useful Expressions
Plot a digital bus from analog waveforms
awvCreateBus("SIGNAL" awvAnalog2Digital(list(VT("/SIGNAL<7>") VT("/SIGNAL<6>") VT("/SIGNAL<5>") VT("/SIGNAL<4>") VT("/SIGNAL<3>") VT("/SIGNAL<2>") VT("/SIGNAL<1>") VT("/SIGNAL<0>")) nil nil 0.5 nil "centre") "Unsigned Decimal")
Adjust list() as needed, MSB first. Example for 8 bit signal.
0.5 is the threshold.
“Unsigned Decimal” can be one of: “Binary” “Signed Decimal”